Importing Verilog Netlists into a Schematic

Verilog netlists can also be brought into the Schematic composer for use in standard cell generation. Note: Your Verilog import file should probably contain all files you wish to be placed in a schematic concatenated together. This make it easier for the importer to find all the specific hierarchies.

To import a Verilog file into Cadence, go to the CIW window and use:

File → Import → Verilog

The following window should appear.

Enter the name of the library where you would like to place the files in the Target Library Name section.

To select the file to be imported:

Highlight the file in the upper scroll window. Then click on the Add button next to Verilog Files To Importl.

Click on OK.

During the process, you should see the various cells of the Verilog netlist generated in the CIW window.

The following window will appear after a successful import of the file.

Click on OK.

This next window will appear and list all of the schematics and symbols instanced in the Verilog file.