The design tools designed by Cadence Design Systems are utilized for class work and research at Oklahoma State University. The following web page lists tutorials and value added items primarily utilized for Oklahoma State University students, staff, and faculty and is Cadence-information related. More importantly, several value added items are given for the serious researcher.

Tutorials

• Information regarding this tutorial and web pages.
• Logging in from remote machine
• Setting Up Your Unix Environment
• Starting Cadence
• Creating Libraries with NCSU CDK
• Schematic entry using Composer
• Create Symbols
• Simulation with Hspice/Spectre (Part I)
• Simulation with Hspice/Spectre (Part II)
• Simulation with Hspice/Spectre (Part III)
• Simulation with Hspice/Spectre (Part IV)
• Custom Layout using Virtuoso
• Design Rule Check (DRC)
• Layout Versus Schematic (LVS) Verification using Diva
• Parasitic Extraction and Simulation (PeX)
• Verilog Simulation with SignalScan
• Importing Verilog Netlists into a Schematic

Value Added Items

• NCSU/OSU FreePDK45
• Skywater Technology Standard-Cell Libraries
• UCSC/OSU OpenRAM
• UCSC/OSU OpenRAM GitHub

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Please contact Professor James Stine for any questions, comments or suggestions related to this web page.  This page was last modified on: 08/02/2023

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